1. Field of the Invention
The present invention relates to decoders that provide micro-operations together with the associated data, such as a branch address, that requires additional processing time.
2. Description of Related Art
Computers process information by executing a sequence of instructions, which may be supplied from a computer program written in a particular format and sequence designed to direct the computer to operate a particular sequence of operations. Most computer programs are written in high level languages such as FORTRAN or "C" which are not directly executable by the computer processor. These high level instructions are translated into instructions, termed "macroinstructions" herein, having a particular format suitable for the processor in which they will be executed. Within the processor, macroinstructions are supplied to a decoder, which decodes them into micro-operations and then issues them to subsequent units for execution.
The micro-operations issued from the decoder have a format particularly suited for those execution units. For example, an issued micro-operation may include opcode fields, immediate fields, one or two source fields, and a destination field, among others.
In order to issue an immediate field for micro-operation, the decoder must be able to direct data from a number of different sources into the immediate field when the micro-operation is issued. A macro-opcode may implicitly specify an immediate. For example, the INC (increment by one) macroinstruction can be implemented with an ADD micro-operation that adds the immediate "one" to the contents of a register. In this case, the macroinstruction implies a literal of "one", which is immediate data that must be inserted into the ADD micro-operation. Other immediate data includes a branch target address and a fall-through address that are provided by a branch address calculation mechanism. In a decoder having an alias mechanism, still another source of data is that which has been extracted explicitly from a macroinstruction. For example, a 32-bit displacement or 32-bit immediate value specified in macroinstructions can be extracted and stored in an alias register.
Some types of data require additional processing before they can be made available for issuance. For example, a branch address calculation can consume so much time that it is difficult to issue it at the same time as the remainder of the micro-operation. Other types of data may also require further processing. In order to avoid delaying the micro-operation and the remainder of data in the pipeline, it would be an advantage to provide a mechanism that allows further operation on later data by taking advantage of situations when the late data field is not needed by the subsequent processing pipe stage, so that this data will have additional time within which to complete its processing. It is also advantageous if this data can then later be synchronized with its associated micro-operation. Such a system would also be useful in a superscalar micro-operation issue machine.